SDK to Offer SiC Epitaxial Wafers with Very Low Defect Density
—Contributing to Commercialization of “Full SiC” Power Modules—
Showa Denko K.K.
Octorber 2, 2015
Showa Denko (SDK) (TOKYO: 4004) has developed a new grade of silicon carbide (SiC) epitaxial wafers for power devices with very low defect density. SDK will this month start commercial shipments of the new grade, in two different sizes of four inches (100mm) and six inches (150mm) in diameter, under the trade name of “High-Grade Epi (“HGE”).
When compared with the mainstream silicon-based semiconductors, SiC-based power devices can operate under high-temperature, high-voltage, and high-current conditions, while substantially reducing energy loss. These features enable the production of smaller, lighter, and more energy-efficient next-generation power control modules. SiC power devices are already used as power sources of servers for data centers, distributed power supply systems for new energies, and in subway railcars. Demand is expected to grow further as plans have been announced to use SiC power devices in vehicles. Furthermore, efforts are under way to develop SiC-based ultra-high-voltage (10KV class) devices for use in power generation/transmission systems.
Power modules for high-voltage, high-current applications mainly contain devices with the structure of SBD (Schottky barrier diode) and transistors with the structure of MOSFET (metal-oxide-semiconductor field-effect transistor). While SiC is increasingly used in SBD, it is difficult to use SiC in MOSFET. As MOSFET’s oxide film, formed on the surface of an epitaxial wafer, is used in device operations, finer surface defect (SD) and various types of crystal defects, including basal plane dislocation (BPD), considerably affect the yield and product quality.
For automotive applications, meanwhile, large chips measuring around 10mm square are made out of epitaxial wafers. This is because one device needs to handle a current as high as 100A. To prevent deterioration in the production yield of such large chips, the defect density of epitaxial wafers should be controlled within 0.1/cm2.
In the new product “HGE,” SDK has succeeded in controlling the number of SD within 0.1/cm2 (one-third the current level of SDK’s conventional product) and of BPD within 0.1/cm2 (one-hundredth or less compared with conventional product). As a result, it is now possible to almost eliminate device defects attributable to BPD (assuming the use of a 10mm square chip). SDK believes that the new product will greatly contribute to the commercialization and market expansion of “full SiC” power modules that combine SiC-SBD and SiC-MOSFET.
Using the HGE technology, SDK has also succeeded in producing SiC epitaxial wafers with film thickness of 100µm or more, having low levels of defect density and good uniformity. SDK will start commercial shipments of these SiC epitaxial wafers for use in power generation/transmission systems. The size of the market for SiC epitaxial wafers for power devices is expected to reach 100 billion in 2025. SDK will continue its efforts to meet requirements for higher quality, contributing toward expansion of the market.
Comparison of defect densities
(based on test results using four-inch epitaxial wafers)
|Conventional||High Grade Epi|
|Basal plane dislocation|
For further information, contact:
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